Quantr Foundation Achievements 2023

RISC-V Simulator

RISC-V is an open and free instruction set architecture (ISA) that supports various types of computing devices, from embedded systems to supercomputers. RISC-V has many advantages over proprietary ISAs, such as lower cost, flexibility, and innovation. However, RISC-V also faces some challenges, such as the lack of standardization, compatibility, and optimization.

To address these challenges, Quantr Foundation, a non-profit organization dedicated to promoting RISC-V education and development, has created a RISC-V simulator that can help developers and learners to design, test, and debug RISC-V based systems. The Quantr RISC-V simulator is a Java-based tool that can run RISC-V assembly programs and display the execution on different microarchitectures, such as single-cycle and pipelined. The simulator also supports the V extension, which adds vector-based SIMD capabilities to RISC-V, enabling faster and more efficient processing of tasks like media, graphics, and machine learning.

The Quantr RISC-V simulator is not only a useful tool for RISC-V enthusiasts, but also a platform for innovation and collaboration. The simulator is open-source and allows users to add custom fields, transform, merge, trim, and encrypt sections of the executable file format, and optimize the performance and security of the system. The simulator also integrates with other RISC-V projects, such as the QtRVSim, a graphical user interface for the simulator, and the Quantr RISC-V executable file format (.QR), a new format specially designed for RISC-V assembled files.

The Quantr RISC-V simulator is a valuable contribution to the RISC-V community, as it demonstrates the potential and possibilities of RISC-V as a universal ISA for the future of computing. By providing a user-friendly and powerful simulator, Quantr Foundation hopes to inspire more people to join the RISC-V movement and create a more diverse and inclusive computing ecosystem.

QEMU Log Panel

QEMU is a popular open-source emulator that can run various operating systems and architectures on a single host machine. QEMU is widely used for CPU development, as it allows developers to test their code on different platforms without the need for physical hardware. However, QEMU also generates a large amount of log data, which can be difficult to analyze and debug.

To solve this problem, Quantr Foundation, a non-profit organization that promotes RISC-V education and development, has created a QEMU log panel, a software tool that can help developers and learners to analyze the log generated by QEMU. The QEMU log panel is a Java-based tool that can convert the QEMU log into an H2 database, which can be queried and manipulated using SQL commands. The QEMU log panel also provides a graphical user interface (GUI) that can display the log data in a table format, and allow users to compare the log data from different sources, such as xv6-riscv, a simple Unix-like operating system for RISC-V, and Quantr’s own RISC-V simulator.

The QEMU log panel is not only a useful tool for QEMU users, but also a platform for learning and innovation. The QEMU log panel is open-source and allows users to customize and extend its functionality, such as adding new fields, transforming, merging, trimming, and encrypting sections of the executable file format, and optimizing the performance and security of the system. The QEMU log panel also integrates with other RISC-V projects, such as the Quantr RISC-V executable file format (.QR), a new format specially designed for RISC-V assembled files, and the Quantr RISC-V simulator, a Java-based tool that can run RISC-V assembly programs and display the execution on different microarchitectures.

The QEMU log panel is a valuable contribution to the QEMU and RISC-V communities, as it demonstrates the power and potential of QEMU as a versatile emulator for CPU development. By providing a user-friendly and powerful log analyzer, Quantr Foundation hopes to inspire more people to join the QEMU and RISC-V movements and create a more diverse and inclusive computing ecosystem.

Quantr Logic – Circuit simulator

Quantr Logic is a circuit simulator that can help developers and learners to design, test, and debug digital logic circuits. Quantr Logic is a web-based tool that can run on any browser and device, without the need for installation or registration. Quantr Logic is developed by Quantr Foundation, a non-profit organization dedicated to promoting RISC-V education and development.

Quantr Logic allows users to create and edit circuits using a drag-and-drop interface, and provides a variety of components, such as gates, flip-flops, multiplexers, decoders, and registers. Quantr Logic also supports the creation of custom components, which can be reused and shared with other users. Quantr Logic can simulate the circuits in real-time, and display the values of the inputs, outputs, and internal signals. Quantr Logic also provides a waveform viewer, which can show the changes of the signals over time, and a truth table generator, which can show the logical relations between the inputs and outputs.

Quantr Logic is not only a useful tool for circuit design, but also a platform for learning and innovation. Quantr Logic is open-source and allows users to contribute to its development and improvement. Quantr Logic also integrates with other RISC-V projects, such as the Quantr RISC-V executable file format (.QR), a new format specially designed for RISC-V assembled files, and the Quantr RISC-V simulator, a Java-based tool that can run RISC-V assembly programs and display the execution on different microarchitectures.

Quantr Logic is a valuable contribution to the circuit design and RISC-V communities, as it demonstrates the power and potential of digital logic circuits as the building blocks of computing systems. By providing a user-friendly and powerful circuit simulator, Quantr Foundation hopes to inspire more people to join the circuit design and RISC-V movements and create a more diverse and inclusive computing ecosystem.

What we do in 2024

The Hong Kong CPU Project is an open source project initiated by Hong Kong people to design and manufacture a central processing unit (CPU) based on the RISC-V architecture. RISC-V is a free and open instruction set architecture (ISA) suitable for various types of computing devices, from embedded systems to supercomputers. RISC-V has many advantages over other proprietary ISAs, such as low cost, flexibility and innovation. The Hong Kong people’s CPU project hopes to use the advantages of RISC-V to create a CPU suitable for Hong Kong people and at the same time promote the development of computer technology in Hong Kong.

Hong Kong’s CPU project covers all stages of CPU design, simulation, verification, compilation, testing and manufacturing. The plan uses a variety of open source tools and platforms, such as QEMU, CPU-Z, Computer and Communication Products Recycling Program, etc. The plan also cooperates with other RISC-V projects, such as Quantr Foundation’s RISC-V simulator, RISC-V executable file format (.QR), QtRVSim, etc. The result of the project is a CPU called HKCPU, which uses the 32-bit RISC-V ISA and supports V extensions, the vectorized SIMD function, which can speed up and improve the efficiency of processing tasks such as media, imaging and machine learning.

The Hong Kong people’s CPU project is a valuable contribution, showing the creativity and ability of Hong Kong people to the world. By providing a user-friendly and powerful CPU, Hong Kong’s CPU Project hopes to inspire more Hong Kong people to participate in the RISC-V movement, while creating a more diverse and inclusive ecosystem for Hong Kong’s computer technology.

香港人嘅cpu計劃是一個由香港人發起嘅開源計劃,目的係為咗設計同製造一個基於RISC-V架構嘅中央處理器(CPU)。RISC-V係一個自由同開放嘅指令集架構(ISA),適用於各種類型嘅計算設備,由嵌入式系統到超級電腦。RISC-V相比其他專有嘅ISA,有好多優勢,例如低成本、靈活性同創新性。香港人嘅cpu計劃希望利用RISC-V嘅優勢,打造一個適合香港人嘅CPU,同時推動香港嘅計算機科技發展。

香港人嘅cpu計劃涵蓋咗CPU嘅設計、模擬、驗證、編譯、測試同製造等各個階段。計劃採用咗多種開源嘅工具同平台,例如QEMU、CPU-Z、電腦及通訊產品回收計劃等。計劃亦同其他RISC-V嘅項目有合作,例如Quantr Foundation嘅RISC-V模擬器、RISC-V執行檔格式(.QR)、QtRVSim等。計劃嘅成果係一個名為HKCPU嘅CPU,佢採用咗32位元嘅RISC-V ISA,支援V擴展,即向量化SIMD功能,可以加快同提高處理媒體、圖像同機器學習等任務嘅效率。

香港人嘅cpu計劃係一個有價值嘅貢獻,向世界展示咗香港人嘅創意同能力。通過提供一個用戶友好同強大嘅CPU,香港人嘅cpu計劃希望激勵更多香港人參與RISC-V嘅運動,同時為香港嘅計算機科技創造一個更多元同包容嘅生態系統。